Technology mapping requires the unmapped logic network to be represented in terms of base functions, usually two-input NORs and inverters. Technology decomposition is the step tha...
Shashidhar Thakur, D. F. Wong, Shankar Krishnamoor...
In this paper we study the area and depth trade-off in LUT based FPGA technology mapping. Starting from a depth-optimal mapping solution, we perform a number of depth relaxation o...
State minimization of incompletely specifiedmachinesis an important step of FSM synthesis. An exact algorithm consists of generation of prime compatibles and solution of a binate ...
Timothy Kam, Tiziano Villa, Robert K. Brayton, Alb...
System developments and research on parallel query processing have concentrated either on "Shared Everything" or "Shared Nothing" architectures so far. While t...
With technology nodes scaling down, the energy consumed by the on-chip intra-tile interconnects is beginning to have a significant impact on the total chip energy. The Energyoptima...