100 search results - page 4 / 20 » The Sizing Rules Method for Analog Integrated Circuit Design |
ISQED
2000
IEEE
2000
IEEE
A Layout Approach for Electrical and Physical Design Integration of High-Performance Analog Circuits
13 years 12 months ago
This paper presents a layout generation tool that aims to reduce the gap between electrical sizing and physical realization of high performance analog circuits. The procedural lay...
DAC
1999
ACM
13 years 12 months ago
1999
ACM
This paper presents a method to reduce the complexity of a linear or linearized (small-signal) analog circuit. The reduction technique, based on quality-error ranking, can be used...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
One of the main tasks in analog design is the sizing of the circuit parameters, such as transistor lengths and widths, in order to obtain optimal circuit performances, such as hig...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
The scaling of CMOS technology into the nanometer era enables the fabrication of highly integrated systems, which increasingly contain analog and/or RF parts. However, scaling into...
CHINAF
2006
13 years 7 months ago
2006
: With soaring work frequency and decreasing feature sizes, VLSI circuits with RLC parasitic components are more like analog circuits and should be carefully analyzed in physical d...