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CONSTRAINTS
2007
112views more  CONSTRAINTS 2007»
13 years 7 months ago
Maxx: Test Pattern Optimisation with Local Search Over an Extended Logic
In the ECAD area, the Test Generation (TG) problem consists in finding an input vector test for some possible diagnosis (a set of faults) of a digital circuit. Such tests may have ...
Francisco Azevedo
ITC
2003
IEEE
148views Hardware» more  ITC 2003»
14 years 1 months ago
HyAC: A Hybrid Structural SAT Based ATPG for Crosstalk
As technology evolves into the deep sub-micron era, signal integrity problems are growing into a major challenge. An important source of signal integrity problems is the crosstalk...
Xiaoliang Bai, Sujit Dey, Angela Krstic
EH
2004
IEEE
115views Hardware» more  EH 2004»
13 years 11 months ago
Intrinsic Evolution of Digital-to-Analog Converters Using a CMOS FPTA Chip
The work presented here tackles the problem of designing a unipolar 6-bit digital-to-analog converter (DAC) with a voltage mode output by hardware evolution. Thereby a Field Progr...
Jörg Langeheine, Karlheinz Meier, Johannes Sc...
ATS
2002
IEEE
101views Hardware» more  ATS 2002»
14 years 26 days ago
An Access Timing Measurement Unit of Embedded Memory
As the deep sub-micron techniques evolving, embedded memories are dominating the yield, while the testing and measurement issues are more difficult due to the access limitations. ...
Shu-Rong Lee, Ming-Jun Hsiao, Tsin-Yuan Chang
FPGA
2005
ACM
195views FPGA» more  FPGA 2005»
14 years 1 months ago
Sparse Matrix-Vector multiplication on FPGAs
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
Ling Zhuo, Viktor K. Prasanna