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FPGA
2009
ACM
148views FPGA» more  FPGA 2009»
14 years 2 months ago
SmartOpt: an industrial strength framework for logic synthesis
In recent years, the maximum logic capacity of each successive FPGA family has been increasing by more than 50%, which motivates scalable solutions. Meanwhile, academic research i...
Stephen Jang, Dennis Wu, Mark Jarvin, Billy Chan, ...
FPGA
2005
ACM
90views FPGA» more  FPGA 2005»
14 years 26 days ago
Using bus-based connections to improve field-programmable gate array density for implementing datapath circuits
Abstract—As the logic capacity of field-programmable gate arrays (FPGAs) increases, they are increasingly being used to implement large arithmetic-intensive applications, which ...
Andy Gean Ye, Jonathan Rose
FPGA
2004
ACM
116views FPGA» more  FPGA 2004»
14 years 22 days ago
Low-power technology mapping for FPGA architectures with dual supply voltages
In this paper we study the technology mapping problem of FPGA architectures with dual supply voltages (Vdds) for power optimization. This is done with the guarantee that the mappi...
Deming Chen, Jason Cong, Fei Li, Lei He
ASPDAC
2011
ACM
215views Hardware» more  ASPDAC 2011»
12 years 11 months ago
An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture
—This paper presents an asynchronous FPGA that combines four-phase dual-rail encoding and LEDR (Level-Encoded Dual-Rail) encoding. Four-phase dual-rail encoding is used for small...
Yoshiya Komatsu, Shota Ishihara, Masanori Hariyama...
FPGA
2009
ACM
209views FPGA» more  FPGA 2009»
14 years 2 months ago
SPR: an architecture-adaptive CGRA mapping tool
In this paper we present SPR, a new architecture-adaptive mapping tool for use with Coarse-Grained Reconfigurable Architectures (CGRAs). It combines a VLIW style scheduler and FP...
Stephen Friedman, Allan Carroll, Brian Van Essen, ...