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ASPDAC
2008
ACM
122views Hardware» more  ASPDAC 2008»
13 years 9 months ago
LP based white space redistribution for thermal via planning and performance optimization in 3D ICs
: Thermal issue is a critical challenge in 3D IC circuit design. Incorporating thermal vias into 3D IC is a promising way to mitigate thermal issues by lowering down the thermal re...
Xin Li, Yuchun Ma, Xianlong Hong, Sheqin Dong, Jas...
IPCO
2007
81views Optimization» more  IPCO 2007»
13 years 9 months ago
Matching Problems in Polymatroids Without Double Circuits
According to the present state of the theory of the matroid matching problem, the existence of a good characterization to the size of a maximum matching depends on the behavior of ...
Márton Makai, Gyula Pap, Jácint Szab...
ISLPED
2009
ACM
125views Hardware» more  ISLPED 2009»
14 years 2 months ago
Behavior-level observability don't-cares and application to low-power behavioral synthesis
Many techniques for power management employed in advanced RTL synthesis tools rely explicitly or implicitly on observability don’t-care (ODC) conditions. In this paper we presen...
Jason Cong, Bin Liu, Zhiru Zhang
ITC
2003
IEEE
127views Hardware» more  ITC 2003»
14 years 26 days ago
Using Logic Models To Predict The Detection Behavior Of Statistical Timing Defects
In this paper, we study the possibility of using logic defect-level prediction models to predict the detection behavior of statistical timing defects. We compare two known logic m...
Li-C. Wang, Angela Krstic, Leonard Lee, Kwang-Ting...
ICCAD
2000
IEEE
124views Hardware» more  ICCAD 2000»
14 years 6 hour ago
A Methodology for Verifying Memory Access Protocols in Behavioral Synthesis
— Memory is one of the most important components to be optimized in the several phases of the synthesis process. ioral synthesis, a memory is viewed as an abstract construct whic...
Gernot Koch, Taewhan Kim, Reiner Genevriere