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GLVLSI
2007
IEEE
194views VLSI» more  GLVLSI 2007»
13 years 11 months ago
Probabilistic maximum error modeling for unreliable logic circuits
Reliability modeling and evaluation is expected to be one of the major issues in emerging nano-devices and beyond 22nm CMOS. Such devices would have inherent propensity for gate f...
Karthikeyan Lingasubramanian, Sanjukta Bhanja
FMSD
2010
118views more  FMSD 2010»
13 years 6 months ago
On simulation-based probabilistic model checking of mixed-analog circuits
In this paper, we consider verifying properties of mixed-signal circuits, i.e., circuits for which there is an interaction between analog (continuous) and digital (discrete) values...
Edmund M. Clarke, Alexandre Donzé, Axel Leg...
DAC
2003
ACM
14 years 8 months ago
Analog and RF circuit macromodels for system-level analysis
Design and validation of mixed-signal integrated systems require evel model abstractions. Generalized Volterra series based models have been successfully applied for analog and RF...
Xin Li, Peng Li, Yang Xu, Lawrence T. Pileggi
ISQED
2009
IEEE
133views Hardware» more  ISQED 2009»
14 years 2 months ago
A novel ACO-based pattern generation for peak power estimation in VLSI circuits
Estimation of maximal power consumption is an essential task in VLSI circuit realizations since power value significantly affects the reliability of the circuits. The key issue o...
Yi-Ling Liu, Chun-Yao Wang, Yung-Chih Chen, Ya-Hsi...
NECO
2011
13 years 2 months ago
Collective Stability of Networks of Winner-Take-All Circuits
The neocortex has a remarkably uniform neuronal organization, suggesting that common principles of processing are employed throughout its extent. In particular, the patterns of co...
Ueli Rutishauser, Rodney J. Douglas, Jean-Jacques ...