570 search results - page 66 / 114 » The behavior of resistive circuits |
GLVLSI
2009
IEEE
14 years 2 months ago
2009
IEEE
Clock distribution networks are an important design issue that is highly dependent on delay variations and load imbalances, while requiring power efficiency. Existing mesh solutio...
SAMOS
2007
Springer
14 years 1 months ago
2007
Springer
Abstract— This paper explores the resistance of MOS Current Mode Logic (MCML) against Differential Power Analysis (DPA) attacks. Circuits implemented in MCML, in fact, have uniqu...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— A new operation mode using a partially depleted hybrid lateral BJT-CMOS inverter on SOI, named as a new unified-BiCMOS (U-BiCMOS) inverter, is proposed. The scheme utilizes the...
CARDIS
2004
Springer
14 years 1 months ago
2004
Springer
CMOS gates consume different amounts of power whether their output has a falling or a rising edge. Therefore the overall power consumption of a CMOS circuit leaks information about...
ISCA
2003
IEEE
14 years 29 days ago
2003
IEEE
With power density and hence cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for runtime processo...