Sciweavers

570 search results - page 85 / 114
» The behavior of resistive circuits
Sort
View
ISCA
2011
IEEE
386views Hardware» more  ISCA 2011»
12 years 11 months ago
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xi...
DATE
2007
IEEE
97views Hardware» more  DATE 2007»
14 years 2 months ago
Estimating functional coverage in bounded model checking
Formal verification is an important issue in circuit and system design. In this context, Bounded Model Checking (BMC) is one of the most successful techniques. But even if all sp...
Daniel Große, Ulrich Kühne, Rolf Drechs...
ICRA
2007
IEEE
159views Robotics» more  ICRA 2007»
14 years 2 months ago
Online trajectory generation in an amphibious snake robot using a lamprey-like central pattern generator model
— This article presents a control architecture for controlling the locomotion of an amphibious snake/lamprey robot capable of swimming and serpentine locomotion. The control arch...
Auke Jan Ijspeert, Alessandro Crespi
FPL
2001
Springer
96views Hardware» more  FPL 2001»
14 years 6 days ago
System Level Tools for DSP in FPGAs
Abstract. Visual data ow environments are ideally suited for modeling digital signal processing (DSP) systems, as many DSP algorithms are most naturally speci ed by signal ow gra...
James Hwang, Brent Milne, Nabeel Shirazi, Jeffrey ...
JOCN
2010
109views more  JOCN 2010»
13 years 6 months ago
Learning Shapes the Representation of Visual Categories in the Aging Human Brain
■ The ability to make categorical decisions and interpret sensory experiences is critical for survival and interactions across the lifespan. However, little is known about the h...
Stephen D. Mayhew, Sheng Li, Joshua K. Storrar, Ka...