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ATVA
2004
Springer
138views Hardware» more  ATVA 2004»
13 years 11 months ago
Providing Automated Verification in HOL Using MDGs
While model checking suffers from the state space explosion problem, theorem proving is quite tedious and impractical for verifying complex designs. In this work, we present a veri...
Tarek Mhamdi, Sofiène Tahar
JWSR
2006
114views more  JWSR 2006»
13 years 7 months ago
Metadata, Ontologies, and Information Models for Grid PSE Toolkits Based on Web Services
: A PSE toolkit is a group of technologies within a software architecture through which multiple PSEs can be built for different application domains. The effective use of a PSE too...
Carmela Comito, Carlo Mastroianni, Domenico Talia
ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
14 years 4 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
SECON
2008
IEEE
14 years 2 months ago
UDAE: Universal Data Access Engine for Sensor Networks
—We present the design and implementation of UDAE, a Universal Data Access Engine for wireless sensor networks. The UDAE allows developers to access data both locally and over th...
Krisakorn Rerkrai, Janne Riihijärvi, Petri M&...
ISSS
2002
IEEE
127views Hardware» more  ISSS 2002»
14 years 23 days ago
Dynamic Common Sub-Expression Elimination during Scheduling in High-Level Synthesis
We introduce a new approach, “Dynamic Common Sub-expression Elimination (CSE)”, that dynamically eliminates common sub- expressions based on new opportunities created during s...
Alexandru Nicolau, Nikil D. Dutt, Rajesh Gupta, Ni...