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» The design of a high performance low power microprocessor
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ISPASS
2007
IEEE
14 years 3 months ago
CA-RAM: A High-Performance Memory Substrate for Search-Intensive Applications
This paper proposes a specialized memory structure called CA-RAM (Content Addressable Random Access Memory) to accelerate search operations present in many important real-world ap...
Sangyeun Cho, Joel R. Martin, Ruibin Xu, Mohammad ...
MASS
2010
248views Communications» more  MASS 2010»
13 years 6 months ago
Adaptive exploitation of cooperative relay for high performance communications in MIMO ad hoc networks
With the popularity of wireless devices and the increase of computing and storage resources, there are increasing interests in supporting mobile computing techniques. Particularly...
Shan Chu, Xin Wang
PCRCW
1997
Springer
14 years 1 months ago
Power/Performance Trade-offs for Direct Networks
High performance portable and space-borne systems continue to demand increasing computation speeds while concurrently attempting to satisfy size, weight, and power constraints. As...
Chirag S. Patel, Sek M. Chai, Sudhakar Yalamanchil...
DATE
2009
IEEE
132views Hardware» more  DATE 2009»
14 years 3 months ago
Power and performance of read-write aware Hybrid Caches with non-volatile memories
—Caches made of non-volatile memory technologies, such as Magnetic RAM (MRAM) and Phase-change RAM (PRAM), offer dramatically different power-performance characteristics when com...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Yu...
HPCA
2009
IEEE
14 years 9 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...