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» The design of a high performance low power microprocessor
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VLSID
1993
IEEE
234views VLSI» more  VLSID 1993»
14 years 27 days ago
NPCPL: Normal Process Complementary Pass Transistor Logic for Low Latency, High Throughput Designs
High throughput and low latency designs are required in modern high performance systems, especially for signal processing applications. Existing logic families cannot provide both...
Debabrata Ghosh, S. K. Nandy, K. Parthasarathy, V....
ASPDAC
2000
ACM
95views Hardware» more  ASPDAC 2000»
14 years 1 months ago
FSM decomposition by direct circuit manipulation applied to low power design
Abstract— Clock-gating techniques are very effective in the reduction of the switching activity in sequential logic circuits. In particular, recent work has shown that significa...
José C. Monteiro, Arlindo L. Oliveira
IPC
2007
IEEE
14 years 3 months ago
Design and Validation of a Low-Power Network Node for Pervasive Applications
Pervasive computing refers to making many computing devices available throughout the physical environment, while making them effectively invisible to the user. To further increase...
Juan-Carlos Cano, Carlos Miguel Tavares Calafate, ...
ISCAS
2007
IEEE
84views Hardware» more  ISCAS 2007»
14 years 3 months ago
High Speed 1-bit Bypass Adder Design for Low Precision Additions
—In this paper, we propose a high speed adder which is adopted for our reconfigurable architecture called FleXilicon. To support sub-word parallelism, the FleXilicon architecture...
Jong-Suk Lee, Dong Sam Ha
IWCMC
2006
ACM
14 years 2 months ago
Low complexity design of space-time convolutional codes with high spectral efficiencies
Space time convolutional codes (STCCs) are an effective way to combine transmit diversity with coding. The computational complexity of designing STCCs generally increases exponent...
Kyungmin Kim, Hamid R. Sadjadpour, Rick S. Blum, Y...