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» The design of a high performance low power microprocessor
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NSDI
2004
13 years 10 months ago
Beehive: O(1) Lookup Performance for Power-Law Query Distributions in Peer-to-Peer Overlays
Structured peer-to-peer hash tables provide decentralization, self-organization, failure-resilience, and good worst-case lookup performance for applications, but suffer from high ...
Venugopalan Ramasubramanian, Emin Gün Sirer
ISCA
2009
IEEE
214views Hardware» more  ISCA 2009»
14 years 3 months ago
Phastlane: a rapid transit optical routing network
Tens and eventually hundreds of processing cores are projected to be integrated onto future microprocessors, making the global interconnect a key component to achieving scalable c...
Mark J. Cianchetti, Joseph C. Kerekes, David H. Al...
RTSS
2009
IEEE
14 years 3 months ago
Multi-Channel Interference Measurement and Modeling in Low-Power Wireless Networks
Abstract—Multi-channel design has received significant attention for low-power wireless networks (LWNs), such as 802.15.4-based wireless sensor networks, due to its potential of...
Guoliang Xing, Mo Sha, Jun Huang, Gang Zhou, Xiaor...
ICRA
2005
IEEE
98views Robotics» more  ICRA 2005»
14 years 2 months ago
The Design of a Mobile Robot for Instrument Network Deployment in Antarctica
- This paper describes the design and fabrication of a low cost, solar powered mobile robot to support a variety of scientific missions on the Antarctic plateau during the austral ...
Laura E. Ray, Alexander D. Price, Alexander D. Str...
ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
14 years 2 months ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu