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» The design of a low energy FPGA
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DAGSTUHL
2007
13 years 8 months ago
Energy Scalability and the RESUME Scalable Video Codec
In the context of the RESUME-project a scalable wavelet-based video decoder was built to demonstrate the benefits of reconfigurable hardware for scalable applications. Scalable v...
Harald Devos, Hendrik Eeckhaut, Mark Christiaens, ...
WOTUG
2008
13 years 8 months ago
FPGA based Control of a Production Cell System
Most motion control systems for mechatronic systems are implemented on digital computers. In this paper we present an FPGA based solution implemented on a low cost Xilinx Spartan I...
Marcel A. Groothuis, Jasper J. P. van Zuijlen, Jan...
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
14 years 18 days ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
GLVLSI
2003
IEEE
185views VLSI» more  GLVLSI 2003»
14 years 20 days ago
Noise tolerant low voltage XOR-XNOR for fast arithmetic
With scaling down to deep submicron and nanometer technologies, noise immunity is becoming a metric of the same importance as power, speed, and area. Smaller feature sizes, low vo...
Mohamed A. Elgamel, Sumeer Goel, Magdy A. Bayoumi
PIMRC
2008
IEEE
14 years 1 months ago
Radio-Triggered Wake-ups with Addressing Capabilities for extremely low power sensor network applications
Sensor network applications are generally characterized by long idle durations and intermittent communication patterns. The traffic loads are typically so low that overall idle d...
Junaid Ansari, Dmitry Pankin, Petri Mähö...