517 search results - page 7 / 104 » The design of a low energy FPGA |
ICETET
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract— Design of Network on chip architectures for multimedia applications is being widely studied. This involves design decisions at various levels of hierarchy. Topology des...
JSA
2010
13 years 2 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
ISLPED
2005
ACM
14 years 27 days ago
2005
ACM
Network-on-chip (NoC) has been proposed as a solution for the global communication challenges of System-on-chip (SoC) design in the nanoscale technologies. NoC design with mesh ba...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
Abstract— We report on the design and test of a lowvoltage temperature sensor designed for MEMS powerharvesting systems. The core of the sensor is a bandgap voltage reference cir...
DAC
1999
ACM
14 years 8 months ago
1999
ACM
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...