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» The design of a low power asynchronous multiplier
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MJ
2007
119views more  MJ 2007»
13 years 7 months ago
Automated energy calculation and estimation for delay-insensitive digital circuits
With increasingly smaller feature sizes and higher on-chip densities, the power dissipation of VLSI systems has become a primary concern for designers. This paper first describes...
Venkat Satagopan, Bonita Bhaskaran, Anshul Singh, ...
ISLPED
2009
ACM
127views Hardware» more  ISLPED 2009»
14 years 2 months ago
Nanometer MOSFET effects on the minimum-energy point of 45nm subthreshold logic
In this paper, we observe that minimum energy Emin of subthreshold logic dramatically increases when reaching 45 nm node. We demonstrate by circuit simulation and analytical model...
David Bol, Dina Kamel, Denis Flandre, Jean-Didier ...
ISCAS
2006
IEEE
144views Hardware» more  ISCAS 2006»
14 years 1 months ago
A VLSI spike-driven dynamic synapse which learns only when necessary
— We describe an analog VLSI circuit implementing spike-driven synaptic plasticity, embedded in a network of integrate-and-fire neurons. This biologically inspired synapse is hi...
S. Mitra, Stefano Fusi, Giacomo Indiveri
ICDCS
2007
IEEE
14 years 1 months ago
Protocol Design and Optimization for Delay/Fault-Tolerant Mobile Sensor Networks
While extensive studies have been carried out in the past several years for many sensor applications, they cannot be applied to the network with extremely low and intermittent con...
Yu Wang, Hongyi Wu, Feng Lin, Nian-Feng Tzeng
SECON
2010
IEEE
13 years 5 months ago
iPoint: A Platform-Independent Passive Information Kiosk for Cell Phones
We introduce iPoint, a passive device that can interact and deliver information to virtually any mobile phone equipped with a WiFi network interface and a camera. The iPoint does n...
Hooman Javaheri, Guevara Noubir