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» The design of a low power asynchronous multiplier
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DAC
1994
ACM
13 years 11 months ago
A Modular Partitioning Approach for Asynchronous Circuit Synthesis
Asynchronous circuits are crucial in designing low power and high performance digital systems. In this paper, we present an ecient modular partitioning approach for asynchronous c...
Ruchir Puri, Jun Gu
ICCD
2005
IEEE
121views Hardware» more  ICCD 2005»
14 years 4 months ago
Asynchronous IC Interconnect Network Design and Implementation Using a Standard ASIC Flow
The implementation of interconnect is becoming a significant challenge in modern IC design. Both synchronous and asynchronous strategies have been suggested to manage this problem...
Bradley R. Quinton, Mark R. Greenstreet, Steven J....
MICRO
2003
IEEE
166views Hardware» more  MICRO 2003»
14 years 24 days ago
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pa...
ISCA
2002
IEEE
105views Hardware» more  ISCA 2002»
14 years 14 days ago
Power and Performance Evaluation of Globally Asynchronous Locally Synchronous Processors
Due to shrinking technologies and increasing design sizes, it is becoming more difficult and expensive to distribute a global clock signal with low skew throughout a processor di...
Anoop Iyer, Diana Marculescu
ASYNC
2006
IEEE
122views Hardware» more  ASYNC 2006»
14 years 1 months ago
A Level-Crossing Flash Asynchronous Analog-to-Digital Converter
Distributed sensor networks, human body implants, and hand-held electronics have tight energy budgets that necessitate low power circuits. Most of these devices include an analog-...
Filipp Akopyan, Rajit Manohar, Alyssa B. Apsel