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DFT
2009
IEEE
178views VLSI» more  DFT 2009»
14 years 4 months ago
Soft Core Embedded Processor Based Built-In Self-Test of FPGAs
This paper presents the first implementation of Built-In Self-Test (BIST) of Field Programmable Gate Arrays (FPGAs) using a soft core embedded processor for reconfiguration of the...
Bradley F. Dutton, Charles E. Stroud
FPL
2007
Springer
101views Hardware» more  FPL 2007»
14 years 4 months ago
Formal Modeling of Process Migration
This paper develops a formal model of process migration that describes programs, processes, and the migration of those processes within a migration realm. A migration realm is a g...
Aric D. Blumer, Henning S. Mortveit, Cameron D. Pa...
CEC
2005
IEEE
14 years 3 months ago
FPGA segmented channel routing using genetic algorithms
A genetic algorithm approach for segmented channel routing in field programmable gate arrays (FPGA's) is presented in this paper. The FPGA segmented channel routing problem (F...
Lipo Wang, Lei Zhou, Wen Liu
IPPS
2005
IEEE
14 years 3 months ago
Experiences with Soft-Core Processor Design
Soft-core processors exploit the flexibility of Field Programmable Gate Arrays (FPGAs) to allow a system designer to customize the processor to the needs of a target application....
Franjo Plavec, Blair Fort, Zvonko G. Vranesic, Ste...
FPL
2004
Springer
141views Hardware» more  FPL 2004»
14 years 3 months ago
Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs
—This paper presents a methodology and a tool for automatic synthesis of highly efficient intrusion detection systems using a high-level, graph-based partitioning methodology and...
Zachary K. Baker, Viktor K. Prasanna