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ARITH
2007
IEEE
14 years 1 months ago
Decimal Floating-Point Adder and Multifunction Unit with Injection-Based Rounding
Shrinking feature sizes gives more headroom for designers to extend the functionality of microprocessors. The IEEE 754R working group has revised the IEEE 754-1985 Standard for Bi...
Liang-Kai Wang, Michael J. Schulte
ISCAS
2008
IEEE
185views Hardware» more  ISCAS 2008»
14 years 1 months ago
A variant of a radix-10 combinational multiplier
— We consider the problem of adding the partial products in the combinational decimal multiplier presented by Lang and Nannarelli. In the original paper this addition is done wit...
Luigi Dadda, Alberto Nannarelli
ARITH
2007
IEEE
13 years 11 months ago
A Software Implementation of the IEEE 754R Decimal Floating-Point Arithmetic Using the Binary Encoding Format
The IEEE Standard 754-1985 for Binary Floating-Point Arithmetic [1] was revised [2], and an important addition is the definition of decimal floating-point arithmetic. This is inte...
Marius Cornea, Cristina Anderson, John Harrison, P...
ARITH
2009
IEEE
14 years 2 months ago
Fully Redundant Decimal Arithmetic
Hardware implementation of all the basic radix-10 arithmetic operations is evolving as a new trend in the design and implementation of general purpose digital processors. Redundan...
Saeid Gorgin, Ghassem Jaberipur
ARITH
2007
IEEE
14 years 1 months ago
Solving Constraints on the Intermediate Result of Decimal Floating-Point Operations
The draft revision of the IEEE Standard for FloatingPoint Arithmetic (IEEE P754) includes a definition for decimal floating-point (FP) in addition to the widely used binary FP s...
Merav Aharoni, Ron Maharik, Abraham Ziv