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DATE
2008
IEEE
105views Hardware» more  DATE 2008»
14 years 3 months ago
Comparison of Boolean Satisfiability Encodings on FPGA Detailed Routing Problems
We compare 12 new encodings for representing of FPGA detailed routing problems as equivalent Boolean Satisfiability (SAT) problems against the only 2 previously used encodings. We...
Miroslav N. Velev, Ping Gao 0002
DATE
2010
IEEE
118views Hardware» more  DATE 2010»
13 years 7 months ago
Exploiting multiple switch libraries in topology synthesis of on-chip interconnection network
Abstract—On-chip interconnection network is a crucial design component in high-performance System-on-Chips (SoCs). Many of previous works have focused on the automation of its to...
Minje Jun, Sungroh Yoon, Eui-Young Chung
ICML
2006
IEEE
14 years 9 months ago
An analysis of graph cut size for transductive learning
I consider the setting of transductive learning of vertex labels in graphs, in which a graph with n vertices is sampled according to some unknown distribution; there is a true lab...
Steve Hanneke
STOC
2002
ACM
96views Algorithms» more  STOC 2002»
14 years 9 months ago
Near-optimal sparse fourier representations via sampling
d Abstract] A. C. Gilbert S. Guhay P. Indykz S. Muthukrishnan M. Strauss We give an algorithm for nding a Fourier representation R of B terms for a given discrete signal A of leng...
Anna C. Gilbert, Sudipto Guha, Piotr Indyk, S. Mut...
GLOBECOM
2006
IEEE
14 years 2 months ago
Blocking Vulnerable Paths of Wireless Sensor Networks
— In this work, we study the topology enhancement problem of wireless sensor networks. Our research focuses on reducing the path-based vulnerability. The objective is to get as m...
Shu Zhou, Min-You Wu, Wei Shu