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» The synthesis of cyclic combinational circuits
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AICCSA
2007
IEEE
84views Hardware» more  AICCSA 2007»
14 years 2 months ago
Encoding Algorithms for Logic Synthesis
This paper presents an encoding algorithm that is very efficient for many different logic synthesis problems. The algorithm is based on the use of special tables and includes two ...
Valery Sklyarov, Iouliia Skliarova
ISCAS
2005
IEEE
137views Hardware» more  ISCAS 2005»
14 years 1 months ago
Direct-digital synthesis using delta-sigma modulated signals
Abstract— A new technique that use of DSM signal in a common technique for dgitally synthesizing an arbitrary waveform, which is generally known as direct-digital synthesis (DDS)...
Yuichiro Orino, Minoru Kuribayashi Kurosawa, Takas...
DATE
2003
IEEE
102views Hardware» more  DATE 2003»
14 years 1 months ago
Power Constrained High-Level Synthesis of Battery Powered Digital Systems
We present a high-level synthesis algorithm solving the combined scheduling, allocation and binding problem minimizing area under both latency and maximum power per clock-cycle co...
S. F. Nielsen, Jan Madsen
CHARME
2001
Springer
117views Hardware» more  CHARME 2001»
14 years 6 days ago
A Higher-Level Language for Hardware Synthesis
We describe SAFL+: a call-by-value, parallel language in the style of ML which combines imperative, concurrent and functional programming. Synchronous channels allow communication ...
Richard Sharp, Alan Mycroft
GLVLSI
2010
IEEE
209views VLSI» more  GLVLSI 2010»
14 years 24 days ago
Enhancing debugging of multiple missing control errors in reversible logic
Researchers are looking for alternatives to overcome the upcoming limits of conventional hardware technologies. Reversible logic thereby established itself as a promising directio...
Jean Christoph Jung, Stefan Frehse, Robert Wille, ...