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» The synthesis of cyclic combinational circuits
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ITC
1995
IEEE
104views Hardware» more  ITC 1995»
13 years 11 months ago
Synthesis of Mapping Logic for Generating Transformed Pseudo-Random Patterns for BIST
During built-in self-test (BIST), the set of patterns generated by a pseudo-random pattern generator may not provide a sufficiently high fault coverage. This paper presents a new ...
Nur A. Touba, Edward J. McCluskey
CODES
2003
IEEE
14 years 1 months ago
A low power scheduler using game theory
In this paper, we describe a new methodology based on game theory for minimizing the average power of a circuit during scheduling in behavioral synthesis. The problem of schedulin...
N. Ranganathan, Ashok K. Murugavel
DATE
2009
IEEE
107views Hardware» more  DATE 2009»
13 years 11 months ago
Sequential logic rectifications with approximate SPFDs
In the digital VLSI cycle, logic transformations are often required to modify the design to meet different synthesis and optimization goals. Logic transformations on sequential ci...
Yu-Shen Yang, Subarna Sinha, Andreas G. Veneris, R...
ICCAD
2009
IEEE
132views Hardware» more  ICCAD 2009»
13 years 5 months ago
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
Lu Wan, Deming Chen
ICRA
2000
IEEE
130views Robotics» more  ICRA 2000»
14 years 2 days ago
Design and Actuation Optimization of a 4 Axes Biped Robot for Walking and Running
Several french laboratories, joint in the CNRS Project "Control of Legged Robots", have defined a biped robot intented to experiment walking and running gaits. This bipe...
Cambrini Chevallereau, Philippe Sardain