3146 search results - page 79 / 630 » The use of compiler optimizations for embedded systems softw... |
140
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CC
2002
Springer
15 years 4 months ago
2002
Springer
Global variable promotion, i.e. allocating unaliased globals to registers, can significantly reduce the number of memory operations. This results in reduced cache activity and less...
129
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CASES
2005
ACM
15 years 6 months ago
2005
ACM
Horizontally partitioned data caches are a popular architectural feature in which the processor maintains two or more data caches at the same level of hierarchy. Horizontally part...
178
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CASES
2007
ACM
15 years 8 months ago
2007
ACM
Recently dual-port SDRAM (DPSDRAM) architecture tailored for dual-processor based mobile embedded systems has been announced where a single memory chip plays the role of the local...
184
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EMSOFT
2008
Springer
15 years 5 months ago
2008
Springer
Dynamic Voltage Scaling (DVS) and Dynamic Power Management (DPM) are two popular techniques commonly employed to save energy in real-time embedded systems. DVS policies aim at red...
148
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CODES
2003
IEEE
15 years 9 months ago
2003
IEEE
Distributed embedded systems implemented with mixed, eventtriggered and time-triggered task sets, which communicate over bus protocols consisting of both static and dynamic phases...