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» Thermal modeling and analysis of 3D multi-processor chips
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3DIC
2009
IEEE
142views Hardware» more  3DIC 2009»
14 years 15 days ago
Electrical-thermal co-analysis for power delivery networks in 3D system integration
- In this paper, an electrical-thermal co-analysis method for power delivery networks in 3D system integration is proposed. For electrical analysis, temperature-dependent electrica...
Jianyong Xie, Daehyun Chung, Madhavan Swaminathan,...
3DIC
2009
IEEE
153views Hardware» more  3DIC 2009»
14 years 2 months ago
Junction-level thermal extraction and simulation of 3DICs
Abstract—In 3DICs heat dissipating devices are stacked directly on top of each other leading to a higher heat density than in a comparable 2D chip. 3D integration also moves the ...
Samson Melamed, Thorlindur Thorolfsson, Adi Sriniv...
DAC
2006
ACM
14 years 8 months ago
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sh...
ICCAD
2004
IEEE
138views Hardware» more  ICCAD 2004»
14 years 4 months ago
A thermal-driven floorplanning algorithm for 3D ICs
As the technology progresses, interconnect delays have become bottlenecks of chip performance. Three dimensional (3D) integrated circuits are proposed as one way to address this p...
Jason Cong, Jie Wei, Yan Zhang
TCAD
2008
114views more  TCAD 2008»
13 years 7 months ago
Three-Dimensional Chip-Multiprocessor Run-Time Thermal Management
Three-dimensional integration has the potential to improve the communication latency and integration density of chip-level multiprocessors (CMPs). However, the stacked highpower de...
Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert ...