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IEEEPACT
2002
IEEE
15 years 9 months ago
A Framework for Parallelizing Load/Stores on Embedded Processors
Many modern embedded processors (esp. DSPs) support partitioned memory banks (also called X-Y memory or dual bank memory) along with parallel load/store instructions to achieve co...
Xiaotong Zhuang, Santosh Pande, John S. Greenland ...
CDC
2009
IEEE
129views Control Systems» more  CDC 2009»
15 years 9 months ago
Resource allocation for signal detection with active sensors
— We consider the problem of determining the existence of known constant signals over a set of sites, given noisy measurements obtained by a team of active sensors that can switc...
Jerome Le Ny, Michael M. Zavlanos, George J. Pappa...
FPGA
2001
ACM
123views FPGA» more  FPGA 2001»
15 years 8 months ago
Mixing buffers and pass transistors in FPGA routing architectures
The routing architecture of an FPGA consists of the length of the wires, the type of switch used to connect wires (buffered, unbuffered, fast or slow) and the topology of the inte...
Mike Sheng, Jonathan Rose
126
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IEEEPACT
2000
IEEE
15 years 8 months ago
On Some Implementation Issues for Value Prediction on Wide-Issue ILP Processors
In this paper, we look at two issues which could affect the performance of value prediction on wide-issue ILP processors. One is the large number of accesses to the value predicti...
Sang Jeong Lee, Pen-Chung Yew
MOBICOM
2000
ACM
15 years 8 months ago
An end-to-end approach to host mobility
We present the design and implementation of an end-to-end architecture for Internet host mobility using dynamic updates to the Domain Name System (DNS) to track host location. Exi...
Alex C. Snoeren, Hari Balakrishnan