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ICCAD
2009
IEEE
136views Hardware» more  ICCAD 2009»
13 years 5 months ago
Multi-functional interconnect co-optimization for fast and reliable 3D stacked ICs
Heat removal and power delivery have become two major reliability concerns in 3D stacked IC technology. For thermal problem, two possible solutions exist: thermal-through-silicon-...
Young-Joon Lee, Rohan Goel, Sung Kyu Lim
TCAD
2011
13 years 2 months ago
Low-Power Clock Tree Design for Pre-Bond Testing of 3-D Stacked ICs
—Pre-bond testing of 3-D stacked integrated circuits (ICs) involves testing each individual die before bonding. The overall yield of 3-D ICs improves with pre-bond testability be...
Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, Sung K...
TVLSI
2010
13 years 2 months ago
Improving Multi-Level NAND Flash Memory Storage Reliability Using Concatenated BCH-TCM Coding
By storing more than one bit in each memory cell, multi-level per cell (MLC) NAND flash memories are dominating global flash memory market due to their appealing storage density ad...
Shu Li, Tong Zhang
WH
2010
255views Healthcare» more  WH 2010»
13 years 2 months ago
Wireless non-contact cardiac and neural monitoring
Ubiquitous physiological monitoring will be a key driving force in the upcoming wireless health revolution. Cardiac and brain signals in the form of ECG and EEG are two critical h...
Yu M. Chi, Patrick Ng, Eric Kang, Joseph Kang, Jen...
ISCA
2011
IEEE
386views Hardware» more  ISCA 2011»
12 years 11 months ago
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xi...