1017 search results - page 10 / 204 » Throughput-centric routing algorithm design |
FPGA
2003
ACM
14 years 1 months ago
2003
ACM
The routing channels of an FPGA consist of wire segments of various types providing the tradeoff between performance and routability. In the routing architectures of recently dev...
ICCD
2008
IEEE
14 years 5 months ago
2008
IEEE
— Circuit and processor designs will continue to increase in complexity for the foreseeable future. With these increasing sizes comes the use of wide buses to move large amounts ...
GLVLSI
2003
IEEE
14 years 1 months ago
2003
IEEE
In dense integrated circuit designs, management of routing congestion is essential; an over congested design may be unroutable. Many factors influence congestion: placement, rout...
TCAD
2008
13 years 7 months ago
2008
In this paper, we propose a high-performance droplet router for a digital microfluidic biochip (DMFB) design. Due to recent advancements in the biomicroelectromechanical system and...
DAC
2007
ACM
14 years 9 months ago
2007
ACM
In this paper, we present a new multi-packing tree (MP-tree) representation for macro placement to handle mixed-size designs. Based on binary trees, the MP-tree is very efficient,...