341 search results - page 4 / 69 » Tile-graph-based power planning |
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Many STUMPS architectures found in current chip designs allow disabling of individual scan chains for debug and diagnosis. In a recent paper it has been shown that this feature can...
VLSID
2010
IEEE
13 years 11 months ago
2010
IEEE
Network-on-Chip combined with Globally Asynchronous Locally Synchronous paradigm is a promising architecture for easy IP integration and utilization with multiple voltage levels. ...
ISBI
2008
IEEE
14 years 8 months ago
2008
IEEE
The simulation of the effect of a high intensity ultrasound interstitial therapy is mainly connected on an accurate estimation of the pressure delivered by the transducer. This pa...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
— Decoupling capacitors (decaps) are typically used to reduce the noise in the power supply network. Because the delay of gates and interconnects is affected by the supply voltag...
IROS
2008
IEEE
14 years 2 months ago
2008
IEEE
— A series of kinodynamic sampling-based planners have appeared over the last decade to deal with high dimensional problems for robots with realistic motion constraints. Yet, ofï...