1532 search results - page 59 / 307 » Tilings Robust to Errors |
159
Voted
IESS
2007
Springer
15 years 12 months ago
2007
Springer
Abstract: The time-triggered System-on-a-Chip (SoC) architecture provides a generic multicore system platform for a family of composable and dependable giga-scale SoCs. It supports...
198
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MICRO
2008
IEEE
16 years 7 days ago
2008
IEEE
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
146
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STOC
1997
ACM
15 years 10 months ago
1997
ACM
Shor has showed how to perform fault tolerant quantum computation when the probability for an error in a qubit or a gate, η, decays with the size of the computation polylogarithmi...
160
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JAMDS
2000
15 years 5 months ago
2000
Bian and Dickey (1996) developed a robust Bayesian estimator for the vector of regression coefficients using a Cauchy-type g-prior. This estimator is an adaptive weighted average o...
179
Voted
JMLR
2006
15 years 5 months ago
2006
The goal of active learning is to determine the locations of training input points so that the generalization error is minimized. We discuss the problem of active learning in line...