Sciweavers

1532 search results - page 8 / 307
» Tilings Robust to Errors
Sort
View
IPPS
2007
IEEE
14 years 2 months ago
Towards Optimal Multi-level Tiling for Stencil Computations
Stencil computations form the performance-critical core of many applications. Tiling and parallelization are two important optimizations to speed up stencil computations. Many til...
Lakshminarayanan Renganarayanan, Manjukumar Harthi...
INTERSPEECH
2010
13 years 3 months ago
An HMM trajectory tiling (HTT) approach to high quality TTS
We propose an HMM Trajectory Tiling (HTT) approach to high quality TTS, which is our entry to Blizzard Challenge 2010. In HTT, first refined HMM is trained with the Minimum Genera...
Yao Qian, Zhi-Jie Yan, Yijian Wu, Frank K. Soong, ...
FCCM
2004
IEEE
87views VLSI» more  FCCM 2004»
14 years 4 days ago
A Quantitative Comparison of Reconfigurable, Tiled, and Conventional Architectures on Bit-Level Computation
General purpose computing architectures are being called on to work on a more diverse application mix every day. This has been fueled by the need for reduced time to market and ec...
David Wentzlaff, Anant Agarwal
CORR
2008
Springer
108views Education» more  CORR 2008»
13 years 8 months ago
Polyomino-Based Digital Halftoning
In this work, we present a new method for generating a threshold structure. This kind of structure can be advantageously used in various halftoning algorithms such as clustered-do...
David Vanderhaeghe, Victor Ostromoukhov
VIS
2007
IEEE
126views Visualization» more  VIS 2007»
14 years 9 months ago
A Unified Paradigm for Scalable Multi-Projector Displays
We present a general framework for the modeling and optimization of scalable multi-projector displays. Based on this framework, we derive algorithms that can robustly optimize the ...
Niranjan Damera-Venkata, Nelson L. Chang, Jeffre...