Two FPGA implementations of a Shape Adaptive Discrete Cosine Transform (SA-DCT) accelerator are presented in this paper: one PCI-based and the other AMBA-based. The former is used...
Andrew Kinane, Alan Casey, Valentin Muresan, Noel ...
—A triangle setup engine (TSE) generates setup parameters for rasterization in 3D graphics hardware. Since the TSE must be flexible for various embedded systems, a programmable T...
The computational fundament of most public-key cryptosystems is the modular multiplication. Improving the efficiency of the modular multiplication is directly associated with the...
David Narh Amanor, Viktor Bunimov, Christof Paar, ...
This paper presents a method for evaluating functions in hardware based on polynomial approximation with non-uniform segments. The novel use of nonuniform segments enables us to ap...
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y...
Third generation’s wireless communications systems comprise advanced signal processing algorithms that increase the computational requirements more than ten-fold over 2G’s sys...
Heiko Michel, Alexander Worm, Norbert Wehn, Michae...