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FPT
2005
IEEE
133views Hardware» more  FPT 2005»
14 years 2 months ago
FPGA-Based Conformance Testing and System Prototyping of an MPEG-4 SA-DCT Hardware Accelerator
Two FPGA implementations of a Shape Adaptive Discrete Cosine Transform (SA-DCT) accelerator are presented in this paper: one PCI-based and the other AMBA-based. The former is used...
Andrew Kinane, Alan Casey, Valentin Muresan, Noel ...
ISCAS
2005
IEEE
164views Hardware» more  ISCAS 2005»
14 years 2 months ago
A 3-way SIMD engine for programmable triangle setup in embedded 3D graphics hardware
—A triangle setup engine (TSE) generates setup parameters for rasterization in 3D graphics hardware. Since the TSE must be flexible for various embedded systems, a programmable T...
Kyusik Chung, Donghyun Kim, Lee-Sup Kim
FPL
2005
Springer
127views Hardware» more  FPL 2005»
14 years 2 months ago
Efficient Hardware Architectures for Modular Multiplication on FPGAs
The computational fundament of most public-key cryptosystems is the modular multiplication. Improving the efficiency of the modular multiplication is directly associated with the...
David Narh Amanor, Viktor Bunimov, Christof Paar, ...
FPL
2003
Springer
113views Hardware» more  FPL 2003»
14 years 2 months ago
Non-uniform Segmentation for Hardware Function Evaluation
This paper presents a method for evaluating functions in hardware based on polynomial approximation with non-uniform segments. The novel use of nonuniform segments enables us to ap...
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y...
DATE
2002
IEEE
161views Hardware» more  DATE 2002»
14 years 2 months ago
Hardware/Software Trade-Offs for Advanced 3G Channel Coding
Third generation’s wireless communications systems comprise advanced signal processing algorithms that increase the computational requirements more than ten-fold over 2G’s sys...
Heiko Michel, Alexander Worm, Norbert Wehn, Michae...