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ITC
2003
IEEE
129views Hardware» more  ITC 2003»
14 years 2 months ago
Relating Yield Models to Burn-In Fall-Out in Time
An early-life reliability model is presented that allows wafer test information to be used to predict not only the total number of burn-in failures that occur for a given product,...
Thomas S. Barnett, Adit D. Singh
FORMATS
2007
Springer
14 years 3 months ago
Hypervolume Approximation in Timed Automata Model Checking
Dierence Bound Matrices (DBMs) are the most commonly used data structure for model checking timed automata. Since long they are being used in successful tools like Kronos or UPPAA...
Víctor A. Braberman, Jorge Lucángeli...
DATE
2005
IEEE
152views Hardware» more  DATE 2005»
14 years 2 months ago
Modeling and Propagation of Noisy Waveforms in Static Timing Analysis
A technique based on the sensitivity of the output to input waveform is presented for accurate propagation of delay information through a gate for the purpose of static timing ana...
Shahin Nazarian, Massoud Pedram, Emre Tuncer, Tao ...
DATE
2003
IEEE
120views Hardware» more  DATE 2003»
14 years 2 months ago
Delay Defect Diagnosis Based Upon Statistical Timing Models - The First Step
Abstract — This paper defines a new diagnosis problem for diagnosing delay defects based upon statistical timing models. We illustrate the differences between the delay defect d...
Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-...
ICONIP
2007
13 years 10 months ago
A System Model for Real-Time Sensorimotor Processing in Brain
Abstract. The present paper addresses a general diagram to investigate the real-time parallel computation mechanism in the brain, using an idea of “Gantt chart.” This diagram e...
Yutaka Sakaguchi