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ESTIMEDIA
2004
Springer
14 years 29 days ago
Data assignment and access scheduling exploration for multi-layer memory architectures
Abstract— This paper presents an exploration framework which performs data assignment and access scheduling exploration for applications given a multilayer memory architecture. O...
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuc...
DATE
2003
IEEE
132views Hardware» more  DATE 2003»
14 years 26 days ago
Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
Youngchul Cho, Ganghee Lee, Sungjoo Yoo, Kiyoung C...
IISWC
2006
IEEE
14 years 1 months ago
Modeling Cache Sharing on Chip Multiprocessor Architectures
— As CMPs are emerging as the dominant architecture for a wide range of platforms (from embedded systems and game consoles, to PCs, and to servers) the need to manage on-chip res...
Pavlos Petoumenos, Georgios Keramidas, Håkan...
AAAI
1998
13 years 9 months ago
Intelligent Control of Life Support Systems for Space Habitats
The Interchamber Monitoring and Control (IMC) system is semi-autonomous, intelligent software that controls life support systems designed for recycling air in remote space habitat...
Debra Schreckenghost, Daniel Ryan, Carroll Thrones...
MOBIHOC
2009
ACM
14 years 8 months ago
Delay and effective throughput of wireless scheduling in heavy traffic regimes: vacation model for complexity
Distributed scheduling algorithms for wireless ad hoc networks have received substantial attention over the last decade. The complexity levels of these algorithms span a wide spec...
Yung Yi, Junshan Zhang, Mung Chiang