Sciweavers

7311 search results - page 1241 / 1463
» Time in State Machines
Sort
View
ISCA
2007
IEEE
192views Hardware» more  ISCA 2007»
16 years 15 days ago
Analysis of redundancy and application balance in the SPEC CPU2006 benchmark suite
The recently released SPEC CPU2006 benchmark suite is expected to be used by computer designers and computer architecture researchers for pre-silicon early design analysis. Partia...
Aashish Phansalkar, Ajay Joshi, Lizy Kurian John
ISCAS
2007
IEEE
173views Hardware» more  ISCAS 2007»
16 years 14 days ago
Critical Charge Characterization for Soft Error Rate Modeling in 90nm SRAM
— Due to continuous technology scaling, the reduction of nodal capacitances and the lowering of power supply voltages result in an ever decreasing minimal charge capable of upset...
Riaz Naseer, Younes Boulghassoul, Jeff Draper, San...
MTV
2007
IEEE
118views Hardware» more  MTV 2007»
16 years 14 days ago
Reduction of Power Dissipation during Scan Testing by Test Vector Ordering
Test vector ordering is recognized as a simple and non-intrusive approach to assist test power reduction. Simulation based test vector ordering approach to minimize circuit transit...
Wang-Dauh Tseng, Lung-Jen Lee
NCA
2007
IEEE
16 years 14 days ago
FRAC: Implementing Role-Based Access Control for Network File Systems
We present FRAC, a Framework for Role-based Access Control in network file systems. FRAC is a reference monitor that controls the message flow between file system clients and s...
Aniruddha Bohra, Stephen Smaldone, Liviu Iftode
SRDS
2007
IEEE
16 years 14 days ago
Using Hidden Semi-Markov Models for Effective Online Failure Prediction
A proactive handling of faults requires that the risk of upcoming failures is continuously assessed. One of the promising approaches is online failure prediction, which means that...
Felix Salfner, Miroslaw Malek
« Prev « First page 1241 / 1463 Last » Next »