769 search results - page 26 / 154 » Timed Circuit Synthesis Using Implicit Methods |
TCAD
2008
13 years 7 months ago
2008
Abstract--Designers and high-level synthesis tools can introduce unwanted cycles in digital circuits, and for certain combinational functions, cyclic circuits that are stable and d...
CEC
2005
IEEE
14 years 1 months ago
2005
IEEE
Evolutionary Algorithms (EAs) are effective and robust methods for solving many practical problems such as feature selection, electrical circuits synthesis, and data mining. Howeve...
DATE
2003
IEEE
14 years 29 days ago
2003
IEEE
The growing impact of within-die process variation has created the need for statistical timing analysis, where gate delays are modeled as random variables. Statistical timing anal...
DATE
2003
IEEE
14 years 29 days ago
2003
IEEE
: Over the years, many design methodologies/tools and layout architectures have been developed for datapath-oriented designs. One commonly used approach for high-speed datapath des...
ASPDAC
2009
ACM
14 years 2 months ago
2009
ACM
- The power gating technique is useful in reducing standby leakage current, but it increases the gate delay. For a functional unit, its maximum allowable delay (for a target clock ...