This paper uses under-approximation of unreachable states of a design to derive incomplete specification of combinational logic. The resulting incompletely-specified functions are...
— Process variations cause significant timing uncertainty and yield degradation in deep sub-micron technologies. A solution to counter timing uncertainty is post-silicon clock t...
— In this paper we present an implicit time-stepping scheme for multibody systems with intermittent contact by incorporating the contact constraints as a set of complementarity a...
Nilanjan Chakraborty, Stephen Berard, Srinivas Ake...
: In this paper we focus on a general approach of using genetic algorithm (GA) to evolve Quantum circuits (QC). We propose a generic GA to evolve arbitrary quantum circuit specifie...
Abstract--Field-programmable gate-array (FPGA) logic synthesis and technology mapping have been studied extensively over the past 15 years. However, progress within the last few ye...