769 search results - page 7 / 154 » Timed Circuit Synthesis Using Implicit Methods |
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
—In this work we propose a novel tree representation for RLC circuits. Genetic programming based on the tree representation is described and applied to passive filter synthesis p...
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
The simulation of on-chip inductance using PEEC-based circuit analysis methods often requires the solution of a subproblem where an extracted inductance matrix must be multiplied ...
LOPSTR
1997
Springer
13 years 11 months ago
1997
Springer
Synthesis of logic programs is considered as a special instance of logic programming. We describe experience made within a logical metaprogramming environment whose central compone...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
1 The first path implicit and exact non–robust path delay fault grading technique for non–scan sequential circuits is presented. Non enumerative exact coverage is obtained, b...
DAC
1999
ACM
13 years 12 months ago
1999
ACM
High performance circuit techniques such as domino logic have migrated from the microprocessor world into more mainstream ASIC designs. The problem is that domino logic comes at a...