769 search results - page 80 / 154 » Timed Circuit Synthesis Using Implicit Methods |
DATE
2007
IEEE
14 years 4 months ago
2007
IEEE
Loop unrolling is a well-known compiler optimization that can lead to significant performance improvements. When used in High Level Synthesis (HLS) unrolling can affect the contr...
ICML
2003
IEEE
14 years 11 months ago
2003
IEEE
Kernel methods have gained a great deal of popularity in the machine learning community as a method to learn indirectly in highdimensional feature spaces. Those interested in rela...
DAC
1994
ACM
14 years 2 months ago
1994
ACM
In this paper, we consider the problem of calculating the signal and transition probabilities of the internal nodes of the combinational logic part of a nite state machine (FSM). ...
DAC
2010
ACM
14 years 2 months ago
2010
ACM
This paper studies the implementation of Boolean functions with lattices of two-dimensional switches. Each switch is controlled by a Boolean literal. If the literal is 1, the swit...
ICCD
2004
IEEE
14 years 7 months ago
2004
IEEE
This paper presents a novel approach to reducing the complexity of the transient linear circuit analysis for a hybrid structured clock network. Topology reduction is first used to...