769 search results - page 8 / 154 » Timed Circuit Synthesis Using Implicit Methods |
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
This paper investigates methods for minimizing the impact of process variation on clock skew using buffer and wire sizing. While most papers on clock trees ignore data-path circuit...
DAC
1994
ACM
13 years 11 months ago
1994
ACM
Asynchronous circuits are crucial in designing low power and high performance digital systems. In this paper, we present an ecient modular partitioning approach for asynchronous c...
VLSI
2007
Springer
14 years 1 months ago
2007
Springer
— While physically driven synthesis techniques have proven to be an effective method to meet tight timing constraints required by a design, the incremental placement step during ...
TVLSI
2010
13 years 2 months ago
2010
A method is described for synthesizing asynchronous circuits based on the Handshake Circuit paradigm but employing a data-driven, rather than a control-driven, style. This approach...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Traditional digital circuit synthesis flows start from an HDL behavioral definition and assume that circuit functions are almost completely defined, making don't-care conditio...