769 search results - page 97 / 154 » Timed Circuit Synthesis Using Implicit Methods |
ISORC
2002
IEEE
14 years 3 months ago
2002
IEEE
Preemption threshold scheduling (PTS) provides prominent benefits for fixed priority scheduling such as increased schedulability, reduced context switches, and decreased memory re...
ISQED
2003
IEEE
14 years 3 months ago
2003
IEEE
This paper describes the use of integer equations for high level modeling digital circuits for application of formal verification properties at this level. Most formal verificatio...
ISQED
2007
IEEE
14 years 4 months ago
2007
IEEE
In this paper, we propose a new approach to enforcing the passivity of a reduced system of general passive linear time invariant circuits. Instead of making the reduced models pas...
VLSID
2006
IEEE
14 years 4 months ago
2006
IEEE
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
ISCAS
2005
IEEE
14 years 3 months ago
2005
IEEE
Abstract— This paper presents and evaluates a hybrid implementation of a low complexity algorithm for speech enhancement, the Adaptive Gain Equalizer (AGE). The AGE is a subband ...