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DATE
2006
IEEE
108views Hardware» more  DATE 2006»
14 years 4 months ago
Test compaction for transition faults under transparent-scan
Transparent-scan was proposed as an approach to test generation and test compaction for scan circuits. Its effectiveness was demonstrated earlier in reducing the test application ...
Irith Pomeranz, Sudhakar M. Reddy
ITC
2000
IEEE
93views Hardware» more  ITC 2000»
14 years 2 months ago
Stuck-fault tests vs. actual defects
This paper studies some manufacturing test data collected for an experimental digital IC. Test results for a large variety of single-stuck fault based test sets are shown and comp...
Edward J. McCluskey, Chao-Wen Tseng
ICCD
1999
IEEE
112views Hardware» more  ICCD 1999»
14 years 2 months ago
On Detecting Bridges Causing Timing Failures
High resistance bridges (resistive bridges) are becoming more common. Such bridges cause speed failures. Published experimental results show that current tests are not good at det...
Sreenivas Mandava, Sreejit Chakravarty, Sandip Kun...
ETS
2006
IEEE
93views Hardware» more  ETS 2006»
14 years 4 months ago
Retention-Aware Test Scheduling for BISTed Embedded SRAMs
In this paper we address the test scheduling problem for Builtin Self-tested (BISTed) embedded SRAMs (e-SRAMs) when Data Retention Faults (DRFs) are considered. The proposed test ...
Qiang Xu, Baosheng Wang, F. Y. Young
DATE
2010
IEEE
149views Hardware» more  DATE 2010»
14 years 2 months ago
Efficient decision ordering techniques for SAT-based test generation
Model checking techniques are promising for automated generation of directed tests. However, due to the prohibitively large time and resource requirements, conventional model chec...
Mingsong Chen, Xiaoke Qin, Prabhat Mishra