176 search results - page 34 / 36 » Timed Verification of Asynchronous Circuits |
FPGA
2003
ACM
14 years 25 days ago
2003
ACM
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...
DATE
2000
IEEE
14 years 1 days ago
2000
IEEE
The Boolean satisfiability problem (SAT) has various applications in electronic design automation (EDA) fields such as testing, timing analysis and logic verification. SAT has bee...
DAC
2007
ACM
13 years 11 months ago
2007
ACM
While cryptographic algorithms are usually strong against mathematical attacks, their practical implementation, both in software and in hardware, opens the door to side-channel at...
C3S2E
2010
ACM
13 years 8 months ago
2010
ACM
Propositional satisfiability solving, or SAT, is an important reasoning task arising in numerous applications, such as circuit design, formal verification, planning, scheduling or...
ISLPED
2003
ACM
14 years 26 days ago
2003
ACM
Enabled by the continuous advancement in fabrication technology, present day synchronous microprocessors include more than 100 million transistors and have clock speeds well in ex...