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CAV
1994
Springer
111views Hardware» more  CAV 1994»
13 years 11 months ago
Automatic Verification of Timed Circuits
This paper presents a new formalism and a new algorithm for verifying timed circuits. The formalism, called orbital nets, allows hierarchical verification based on abehavioralseman...
Tomas Rokicki, Chris J. Myers
ASYNC
2005
IEEE
96views Hardware» more  ASYNC 2005»
14 years 1 months ago
GasP Control for Domino Circuits
We present two novel asynchronous control circuits for domino pipelines. The control circuits are based on GasP circuits, have a minimum cycle time of six gate delays, and compare...
Jo C. Ebergen, Jonathan Gainsley, Jon K. Lexau, Iv...
ACSD
2007
IEEE
67views Hardware» more  ACSD 2007»
14 years 1 months ago
Hazard Checking of Timed Asynchronous Circuits Revisited
This paper proposes a new approach for the hazard checking of timed asynchronous circuits. Previous papers proposed either exact algorithms, which suffer from statespace explosion...
Frédéric Béal, Tomohiro Yoned...
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
13 years 12 months ago
Synthesis of asynchronous control circuits with automatically generated relative timing assumptions
This paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ens...
Jordi Cortadella, Michael Kishinevsky, Steven M. B...
ASPDAC
2001
ACM
73views Hardware» more  ASPDAC 2001»
13 years 11 months ago
Timed circuits: a new paradigm for high-speed design
Abstract-- In order to continue to produce circuits of increasing speeds, designers must consider aggressive circuit design styles such as self-resetting or delayed-reset domino ci...
Chris J. Myers, Wendy Belluomini, Kip Kallpack, Er...