176 search results - page 8 / 36 » Timed Verification of Asynchronous Circuits |
ASYNC
1997
IEEE
13 years 11 months ago
1997
IEEE
This paper presents new timing analysis algorithms for efficient state space exploration during timed circuit synthesis. Timed circuits are a class of asynchronous circuits that i...
ASYNC
2007
IEEE
14 years 2 months ago
2007
IEEE
On-chip high-bandwidth sampling circuits supplement traditional test and debug techniques by non-invasively probing analog voltages for off-chip measurement. Existing circuits rel...
ENTCS
2006
13 years 7 months ago
2006
The application of formal methods to analog and mixed signal circuits requires efficient methods tructing abstractions of circuit behaviors. This paper concerns the verification o...
ICCAD
1999
IEEE
13 years 12 months ago
1999
IEEE
We introduce a new method of verifying the timing of custom CMOS circuits. Due to the exponential number of patterns required, traditional simulation methods are unable to exhaust...
DAC
1996
ACM
13 years 11 months ago
1996
ACM
-- This paper presents an efficient method for the timing verification of concurrent systems, modeled as labeled Timed Petri nets. The verification problems we consider require us ...