49 search results - page 1 / 10 » Timing Analysis with Implicitly Specified False Paths |
VLSID
2000
IEEE
14 years 3 months ago
2000
IEEE
We consider the problem of timing analysis in the presence of known false paths. The main difficulty in adaptation of classical breadth-first search to the problem is that at each...
DAC
2000
ACM
14 years 3 months ago
2000
ACM
ASPDAC
2006
ACM
14 years 2 months ago
2006
ACM
- We propose a framework to unify the process of false paths and multi-cycle paths in static timing analysis (STA). We use subgraphs attached with timing constraints to represent f...
DAC
2010
ACM
14 years 2 months ago
2010
ACM
Timing exception verification has become a center of interest as incorrect constraints can lead to chip failures. Proving that a false path is valid or not is a difficult problem ...
ISSS
1998
IEEE
14 years 3 months ago
1998
IEEE
False path analysis is an activity with applications in a variety of computer science and engineering domains like for instance high-level synthesis, worst case execution time est...