483 search results - page 70 / 97 » Timing Games and Shared Memory |
DATE
2007
IEEE
14 years 4 months ago
2007
IEEE
Recently there has been considerable interest in incorporating timing effects of microarchitectural features of processors (e.g. caches and pipelines) into the schedulability anal...
ICPPW
2006
IEEE
14 years 3 months ago
2006
IEEE
Applications augmented with adaptive capabilities are becoming common in parallel computing environments which share resources such as main memory, network, or disk I/O. For large...
CODES
2005
IEEE
14 years 3 months ago
2005
IEEE
This paper presents a novel approach for multiprocess synthesis supporting well-tailored module integration at system level. The goal is to extend the local scope of existing arch...
ICCD
2007
IEEE
14 years 1 months ago
2007
IEEE
In this paper we propose techniques to dynamically downsize or upsize a cache accompanied by cache set/line shutdown to produce efficient caches. Unlike previous approaches, resiz...
PDPTA
2007
13 years 11 months ago
2007
- Serial algorithms to evaluate the Gabor transform of a discrete signal are bound by the length of signal for which the transform can be evaluated. The time taken, if machine memo...