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» Timing Optimization of Logic Network Using Gate Duplication
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ISORC
2002
IEEE
14 years 13 days ago
End-to-End Latency of a Fault-Tolerant CORBA Infrastructure
This paper presents measured probability density functions (pdfs) for the end-to-end latency of two-way remote method invocations from a CORBA client to a replicated CORBA server ...
Wenbing Zhao, Louise E. Moser, P. M. Melliar-Smith
IAJIT
2007
146views more  IAJIT 2007»
13 years 7 months ago
Adaptive Optimizing of Hello Messages in Wireless Ad-Hoc Networks
: Routing is an important functional aspect in wireless ad-hoc networks that handles discovering and maintaining the paths between nodes within a network. Due to nodes mobility, th...
Essam Natsheh, Adznan B. Jantan, Sabira Khatun, Su...
GECCO
2004
Springer
164views Optimization» more  GECCO 2004»
14 years 27 days ago
Fuzzy Dominance Based Multi-objective GA-Simplex Hybrid Algorithms Applied to Gene Network Models
Hybrid algorithms that combine genetic algorithms with the Nelder-Mead simplex algorithm have been effective in solving certain optimization problems. In this article, we apply a s...
Praveen Koduru, Sanjoy Das, Stephen Welch, Judith ...
DAC
2003
ACM
14 years 8 months ago
On-chip logic minimization
While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such a...
Roman L. Lysecky, Frank Vahid
ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
14 years 28 days ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks