141 search results - page 23 / 29 » Timing Tolerances in Safety-Critical Software |
ASPLOS
2009
ACM
14 years 10 months ago
2009
ACM
Future processors are expected to observe increasing rates of hardware faults. Using Dual-Modular Redundancy (DMR), two cores of a multicore can be loosely coupled to redundantly ...
CONEXT
2009
ACM
13 years 11 months ago
2009
ACM
Software bugs in routers lead to network outages, security vulnerabilities, and other unexpected behavior. Rather than simply crashing the router, bugs can violate protocol semant...
MICRO
2008
IEEE
14 years 4 months ago
2008
IEEE
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
CODES
2007
IEEE
14 years 4 months ago
2007
IEEE
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
NIME
2005
Springer
14 years 3 months ago
2005
Springer
In recent years Computer Network-Music has increasingly captured the attention of the Computer Music Community. With the advent of Internet communication, geographical displacemen...