264 search results - page 20 / 53 » Timing driven power gating |
ICCAD
2001
IEEE
14 years 5 months ago
2001
IEEE
Retiming is a widely investigated technique for performance optimization. It performs powerful modifications on a circuit netlist. However, often it is not clear, whether the pred...
PPL
2008
13 years 8 months ago
2008
This paper presents the FPGA implementation of the prototype for the Data-Driven Chip-Multiprocessor (D2-CMP). In particular, we study the implementation of a Thread Synchronizati...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
In nanometer scaled CMOS devices significant increase in the subthreshold, the gate and the reverse biased junction band-toband-tunneling (BTBT) leakage, results in the large incr...
ISPD
2003
ACM
14 years 1 months ago
2003
ACM
This paper presents a new timing driven force directed placement algorithm that meets physical net length constraints as well as constraints on specific pin sets. It is the first ...
ISORC
2005
IEEE
14 years 2 months ago
2005
IEEE
As complexity of real-time embedded software grows, it is desirable to use formal verification techniques to achieve a high level of assurance. We discuss application of model-ch...