57 search results - page 10 / 12 » Timing metrics for physical design of deep submicron technol... |
TCAD
2002
13 years 7 months ago
2002
This paper introduces an accurate analysis of on-chip inductance effects for distributed interconnects that takes the effect of both the series resistance and the output parasitic ...
DAC
2001
ACM
14 years 8 months ago
2001
ACM
Milenko Drinic UCLA Computer Science Dep. 4732 Boelter Hall Los Angeles, CA 90095-1596 milenko@cs.ucla.edu Darko Kirovski Microsoft Research One Microsoft Way Redmond, WA 98052 da...
DAC
1999
ACM
14 years 8 months ago
1999
ACM
The many levels of metal used in aggressive deep submicron process technologies has made fast and accurate capacitance extraction of complicated 3-D geometries of conductors essen...
CIKM
2006
Springer
13 years 11 months ago
2006
Springer
In this paper, we propose an approach for efficient approximative RkNN search in arbitrary metric spaces where the value of k is specified at query time. Our method uses an approx...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
With shrinking feature size and growing integration density in the Deep Sub-Micron technologies, the global buses are fast becoming the “weakest-links” in VLSI design. They ha...