266 search results - page 11 / 54 » Timing yield estimation using statistical static timing anal... |
ICCAD
2005
IEEE
14 years 5 months ago
2005
IEEE
— Process variations cause significant timing uncertainty and yield degradation in deep sub-micron technologies. A solution to counter timing uncertainty is post-silicon clock t...
DATE
1997
IEEE
14 years 23 days ago
1997
IEEE
: In this paper, we present a new dynamic power estimation method that produces accurate power measures at considerably faster run times. The approach uses an enhanced switch-level...
DATE
2008
IEEE
14 years 3 months ago
2008
IEEE
Shrinking feature sizes and process variations are of increasing concern in modern technology. It is urgent that we develop statistical interconnect timing models which are harmon...
RTSS
2003
IEEE
14 years 1 months ago
2003
IEEE
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...
WCET
2010
13 years 6 months ago
2010
This paper considers the use of Extreme Value Theory (EVT) to model worst-case execution times. In particular it considers the sacrifice that statistical methods make in the reali...